Silicon Photonics Foundry-oriented Y-junction Optimization

Descripción del Articulo

Silicon photonics is the leading platform for pho-tonic integrated circuits (PICs) because of its low fabrication cost and a small area on-chip, which allows the forefront of the industry to develop low-energy consuming devices. For the implementation of PICs, among passive devices, the most used be...

Descripción completa

Detalles Bibliográficos
Autores: De La Cruz-Coronado J.M., Prosopio-Galarza R., Rubio-Noriega R.E.
Formato: artículo
Fecha de Publicación:2020
Institución:Consejo Nacional de Ciencia Tecnología e Innovación
Repositorio:CONCYTEC-Institucional
Lenguaje:inglés
OAI Identifier:oai:repositorio.concytec.gob.pe:20.500.12390/2502
Enlace del recurso:https://hdl.handle.net/20.500.12390/2502
https://doi.org/10.1109/INTERCON50315.2020.9220205
Nivel de acceso:acceso abierto
Materia:Silicon photonics
inverse design
multi-project wafer
non-intuitive design
http://purl.org/pe-repo/ocde/ford#2.02.01
id CONC_c49810d921f1faf58c19e0535181e6d0
oai_identifier_str oai:repositorio.concytec.gob.pe:20.500.12390/2502
network_acronym_str CONC
network_name_str CONCYTEC-Institucional
repository_id_str 4689
dc.title.none.fl_str_mv Silicon Photonics Foundry-oriented Y-junction Optimization
title Silicon Photonics Foundry-oriented Y-junction Optimization
spellingShingle Silicon Photonics Foundry-oriented Y-junction Optimization
De La Cruz-Coronado J.M.
Silicon photonics
inverse design
multi-project wafer
non-intuitive design
http://purl.org/pe-repo/ocde/ford#2.02.01
title_short Silicon Photonics Foundry-oriented Y-junction Optimization
title_full Silicon Photonics Foundry-oriented Y-junction Optimization
title_fullStr Silicon Photonics Foundry-oriented Y-junction Optimization
title_full_unstemmed Silicon Photonics Foundry-oriented Y-junction Optimization
title_sort Silicon Photonics Foundry-oriented Y-junction Optimization
author De La Cruz-Coronado J.M.
author_facet De La Cruz-Coronado J.M.
Prosopio-Galarza R.
Rubio-Noriega R.E.
author_role author
author2 Prosopio-Galarza R.
Rubio-Noriega R.E.
author2_role author
author
dc.contributor.author.fl_str_mv De La Cruz-Coronado J.M.
Prosopio-Galarza R.
Rubio-Noriega R.E.
dc.subject.none.fl_str_mv Silicon photonics
topic Silicon photonics
inverse design
multi-project wafer
non-intuitive design
http://purl.org/pe-repo/ocde/ford#2.02.01
dc.subject.es_PE.fl_str_mv inverse design
multi-project wafer
non-intuitive design
dc.subject.ocde.none.fl_str_mv http://purl.org/pe-repo/ocde/ford#2.02.01
description Silicon photonics is the leading platform for pho-tonic integrated circuits (PICs) because of its low fabrication cost and a small area on-chip, which allows the forefront of the industry to develop low-energy consuming devices. For the implementation of PICs, among passive devices, the most used because of its functionality is the power splitter. Y-junctions are power splitters that are compact and can deliver relatively wide-band frequency responses. In order to respond to the current demands of silicon photonics foundries, this work proposes a method based on the Particle Swarm Optimization to design always-feasible and mass-production oriented Y-junctions. We have achieved transmittances above 49%, and a flat frequency response in the SCL optical communications band. © 2020 IEEE.
publishDate 2020
dc.date.accessioned.none.fl_str_mv 2024-05-30T23:13:38Z
dc.date.available.none.fl_str_mv 2024-05-30T23:13:38Z
dc.date.issued.fl_str_mv 2020
dc.type.none.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.uri.none.fl_str_mv https://hdl.handle.net/20.500.12390/2502
dc.identifier.doi.none.fl_str_mv https://doi.org/10.1109/INTERCON50315.2020.9220205
dc.identifier.scopus.none.fl_str_mv 2-s2.0-85095421739
url https://hdl.handle.net/20.500.12390/2502
https://doi.org/10.1109/INTERCON50315.2020.9220205
identifier_str_mv 2-s2.0-85095421739
dc.language.iso.none.fl_str_mv eng
language eng
dc.relation.ispartof.none.fl_str_mv Proceedings of the 2020 IEEE 27th International Conference on Electronics, Electrical Engineering and Computing, INTERCON 2020
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers Inc.
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers Inc.
dc.source.none.fl_str_mv reponame:CONCYTEC-Institucional
instname:Consejo Nacional de Ciencia Tecnología e Innovación
instacron:CONCYTEC
instname_str Consejo Nacional de Ciencia Tecnología e Innovación
instacron_str CONCYTEC
institution CONCYTEC
reponame_str CONCYTEC-Institucional
collection CONCYTEC-Institucional
repository.name.fl_str_mv Repositorio Institucional CONCYTEC
repository.mail.fl_str_mv repositorio@concytec.gob.pe
_version_ 1839175662286405632
spelling Publicationrp06382600rp06381600rp06383600De La Cruz-Coronado J.M.Prosopio-Galarza R.Rubio-Noriega R.E.2024-05-30T23:13:38Z2024-05-30T23:13:38Z2020https://hdl.handle.net/20.500.12390/2502https://doi.org/10.1109/INTERCON50315.2020.92202052-s2.0-85095421739Silicon photonics is the leading platform for pho-tonic integrated circuits (PICs) because of its low fabrication cost and a small area on-chip, which allows the forefront of the industry to develop low-energy consuming devices. For the implementation of PICs, among passive devices, the most used because of its functionality is the power splitter. Y-junctions are power splitters that are compact and can deliver relatively wide-band frequency responses. In order to respond to the current demands of silicon photonics foundries, this work proposes a method based on the Particle Swarm Optimization to design always-feasible and mass-production oriented Y-junctions. We have achieved transmittances above 49%, and a flat frequency response in the SCL optical communications band. © 2020 IEEE.Consejo Nacional de Ciencia, Tecnología e Innovación Tecnológica - ConcytecengInstitute of Electrical and Electronics Engineers Inc.Proceedings of the 2020 IEEE 27th International Conference on Electronics, Electrical Engineering and Computing, INTERCON 2020info:eu-repo/semantics/openAccessSilicon photonicsinverse design-1multi-project wafer-1non-intuitive design-1http://purl.org/pe-repo/ocde/ford#2.02.01-1Silicon Photonics Foundry-oriented Y-junction Optimizationinfo:eu-repo/semantics/articlereponame:CONCYTEC-Institucionalinstname:Consejo Nacional de Ciencia Tecnología e Innovacióninstacron:CONCYTEC20.500.12390/2502oai:repositorio.concytec.gob.pe:20.500.12390/25022024-05-30 16:08:48.881http://purl.org/coar/access_right/c_14cbinfo:eu-repo/semantics/closedAccessmetadata only accesshttps://repositorio.concytec.gob.peRepositorio Institucional CONCYTECrepositorio@concytec.gob.pe#PLACEHOLDER_PARENT_METADATA_VALUE##PLACEHOLDER_PARENT_METADATA_VALUE##PLACEHOLDER_PARENT_METADATA_VALUE#<Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="9983b646-50e9-4483-b2b4-6b7d41a7de50"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Silicon Photonics Foundry-oriented Y-junction Optimization</Title> <PublishedIn> <Publication> <Title>Proceedings of the 2020 IEEE 27th International Conference on Electronics, Electrical Engineering and Computing, INTERCON 2020</Title> </Publication> </PublishedIn> <PublicationDate>2020</PublicationDate> <DOI>https://doi.org/10.1109/INTERCON50315.2020.9220205</DOI> <SCP-Number>2-s2.0-85095421739</SCP-Number> <Authors> <Author> <DisplayName>De La Cruz-Coronado J.M.</DisplayName> <Person id="rp06382" /> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> <Author> <DisplayName>Prosopio-Galarza R.</DisplayName> <Person id="rp06381" /> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> <Author> <DisplayName>Rubio-Noriega R.E.</DisplayName> <Person id="rp06383" /> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Institute of Electrical and Electronics Engineers Inc.</DisplayName> <OrgUnit /> </Publisher> </Publishers> <Keyword>Silicon photonics</Keyword> <Keyword>inverse design</Keyword> <Keyword>multi-project wafer</Keyword> <Keyword>non-intuitive design</Keyword> <Abstract>Silicon photonics is the leading platform for pho-tonic integrated circuits (PICs) because of its low fabrication cost and a small area on-chip, which allows the forefront of the industry to develop low-energy consuming devices. For the implementation of PICs, among passive devices, the most used because of its functionality is the power splitter. Y-junctions are power splitters that are compact and can deliver relatively wide-band frequency responses. In order to respond to the current demands of silicon photonics foundries, this work proposes a method based on the Particle Swarm Optimization to design always-feasible and mass-production oriented Y-junctions. We have achieved transmittances above 49%, and a flat frequency response in the SCL optical communications band. © 2020 IEEE.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication> -1
score 13.448654
Silicon Photonics Foundry-oriented Y-junction Optimization
Nota importante:
La información contenida en este registro es de entera responsabilidad de la institución que gestiona el repositorio institucional donde esta contenido este documento o set de datos. El CONCYTEC no se hace responsable por los contenidos (publicaciones y/o datos) accesibles a través del Repositorio Nacional Digital de Ciencia, Tecnología e Innovación de Acceso Abierto (ALICIA).

Ejemplares Similares