Cita APA

Morales Villanueva, A., & Briceño Aranda, C. (2007). Design and implementation of a neural network in an FPGA for pattern recovery.

Citación estilo Chicago

Morales Villanueva, Aurelio, y Cesar Briceño Aranda. Design and Implementation of a Neural Network in an FPGA for Pattern Recovery. 2007.

Cita MLA

Morales Villanueva, Aurelio, y Cesar Briceño Aranda. Design and Implementation of a Neural Network in an FPGA for Pattern Recovery. 2007.