Factibilidad de integrar split-drain MAGFETs con alta sensibilidad en tecnología CMO

• Autor: Santillán Quiñonez y Cols., Gerard Franz
• Formato: artículo
• Fecha de Publicación: 2019
• Institución: Centro de Preparación para la Ciencia y Tecnología
• Repositorio: ECIPERÚ
• Lenguaje: español
• OAI Identifier: oai:revistas.eciperu.net:article/207
• Enlace del recurso: https://revistas.eciperu.net/index.php/ECIPERU/article/view/207
• Nivel de acceso: acceso abierto
• Materia: MAGFET, split-drain MAGFET, efectos galvanomagnéticos, efecto Hall, magnetorresistencia, sensor magnético.; MAGFET, split-drain MAGFET, galvanomagnetic effects, Hall effect, magnetoresistance, magnetic sensor.

The feasibility of a Split-Drain MAGFET as magnetic sensor has been explored with several methodologies, but without simultaneously advantaging more than one galvanomagnetic effect. Unifying theorically and experimentally developed works, continuous analytical models for the relationship between forces acting in the deflection direction and for the Hall angle, as well as design criteria to increase the sensitivity of a Split-Drain MAGFET are presented. The proposed analysis shows that it is possible to take advantage of the current-lines deflection and magnetoresistance effects in order to increase the sensitivity of a Split-Drain MAGFET. With a Split-Drain MAGFET with a channel considered as a short Hall plate, sensitivities up to 59%/T have been experimentally obtained measuring magnetic flux densities from 90 µT to 275 µT. This is possible due to the contribution of the two considered galvanomagnetic effects. Additionally, a SPICE macro model for a SplitDrain MAGFET is proposed to facilitate its use in more complex circuits. With respect to the obtained experimental results, the proposed SPICE macro model has an error <1.6 % generating the drain current imbalance. Since a Split-Drain MAGFET is compatible with CMOS technology, dominating in integrated circuits, the obtained results show that it is feasible to use it as magnetic sensor in CMOS integrated systems of high complexity, which opens a wide range of low cost applications.