Implementation of a high performance embedded MPC on FPGA using high-level synthesis
Descripción del Articulo
Model predictive control (MPC) has been, since its introduction in the late 70’s, a well accepted control technique, especially for industrial processes, which are typically slow and allow for on-line calculation of the control inputs. Its greatest advantage is its ability to consider constraints, o...
Autor: | |
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Formato: | tesis de maestría |
Fecha de Publicación: | 2017 |
Institución: | Pontificia Universidad Católica del Perú |
Repositorio: | PUCP-Tesis |
Lenguaje: | inglés |
OAI Identifier: | oai:tesis.pucp.edu.pe:20.500.12404/8833 |
Enlace del recurso: | http://hdl.handle.net/20.500.12404/8833 |
Nivel de acceso: | acceso abierto |
Materia: | Control predictivo Procesos de manufactura Sistemas embebidos (Computadoras) https://purl.org/pe-repo/ocde/ford#2.00.00 |
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dc.title.es_ES.fl_str_mv |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
title |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
spellingShingle |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis Araujo Barrientos, Antonio Control predictivo Procesos de manufactura Sistemas embebidos (Computadoras) https://purl.org/pe-repo/ocde/ford#2.00.00 |
title_short |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
title_full |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
title_fullStr |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
title_full_unstemmed |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
title_sort |
Implementation of a high performance embedded MPC on FPGA using high-level synthesis |
author |
Araujo Barrientos, Antonio |
author_facet |
Araujo Barrientos, Antonio |
author_role |
author |
dc.contributor.advisor.fl_str_mv |
Geletu, Abebe Villota Cerna, Elizabeth |
dc.contributor.author.fl_str_mv |
Araujo Barrientos, Antonio |
dc.subject.es_ES.fl_str_mv |
Control predictivo Procesos de manufactura Sistemas embebidos (Computadoras) |
topic |
Control predictivo Procesos de manufactura Sistemas embebidos (Computadoras) https://purl.org/pe-repo/ocde/ford#2.00.00 |
dc.subject.ocde.es_ES.fl_str_mv |
https://purl.org/pe-repo/ocde/ford#2.00.00 |
description |
Model predictive control (MPC) has been, since its introduction in the late 70’s, a well accepted control technique, especially for industrial processes, which are typically slow and allow for on-line calculation of the control inputs. Its greatest advantage is its ability to consider constraints, on both inputs and states, directly and naturally. More recently, the improvements in processor speed have allowed its use in a wider range of problems, many involving faster dynamics. Nevertheless, implementation of MPC algorithms on embedded systems with resources, size, power consumption and cost constraints remains a challenge. In this thesis, High-Level Synthesis (HLS) is used to implement implicit MPC algo- rithms for linear (LMPC) and nonlinear (NMPC) plant models, considering constraints on both control inputs and states of the system. The algorithms are implemented in the Zynq@ -7000 All Programmable System-on-a-Chip (AP SoC) ZC706 Evaluation Kit, targeting Xilinx’s Zynq@-7000 AP SoC which contains a general purpose Field Programmable Gate Array (FPGA). In order to solve the optimization problem at each sampling instant, an Interior-Point Method (IPM) is used. The main computation cost of this method is the solution of a system of linear equations. A minimum residual (MINRES) algorithm is used for the solution of this system of equations taking into consideration its special structure in order to make it computationally efficient. A library was created for the linear algebra operations required for the IPM and MINRES algorithms. The implementation is tested on trajectory tracking case studies. Results for the linear case show good performance and implementation metrics, as well as computation times within the considered sampling periods. For the nonlinear case, although a high computation time was needed, the algorithm performed well on the case study presented. Because of resources constraints, implementation of the nonlinear algorithm on higher order systems was precluded. |
publishDate |
2017 |
dc.date.accessioned.es_ES.fl_str_mv |
2017-06-19T22:33:37Z |
dc.date.available.es_ES.fl_str_mv |
2017-06-19T22:33:37Z |
dc.date.created.es_ES.fl_str_mv |
2017 |
dc.date.issued.fl_str_mv |
2017-06-19 |
dc.type.es_ES.fl_str_mv |
info:eu-repo/semantics/masterThesis |
format |
masterThesis |
dc.identifier.uri.none.fl_str_mv |
http://hdl.handle.net/20.500.12404/8833 |
url |
http://hdl.handle.net/20.500.12404/8833 |
dc.language.iso.es_ES.fl_str_mv |
eng |
language |
eng |
dc.relation.ispartof.fl_str_mv |
SUNEDU |
dc.rights.es_ES.fl_str_mv |
info:eu-repo/semantics/openAccess |
dc.rights.uri.*.fl_str_mv |
http://creativecommons.org/licenses/by-nc-nd/2.5/pe/ |
eu_rights_str_mv |
openAccess |
rights_invalid_str_mv |
http://creativecommons.org/licenses/by-nc-nd/2.5/pe/ |
dc.publisher.es_ES.fl_str_mv |
Pontificia Universidad Católica del Perú |
dc.publisher.country.es_ES.fl_str_mv |
PE |
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reponame:PUCP-Tesis instname:Pontificia Universidad Católica del Perú instacron:PUCP |
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Geletu, AbebeVillota Cerna, ElizabethAraujo Barrientos, Antonio2017-06-19T22:33:37Z2017-06-19T22:33:37Z20172017-06-19http://hdl.handle.net/20.500.12404/8833Model predictive control (MPC) has been, since its introduction in the late 70’s, a well accepted control technique, especially for industrial processes, which are typically slow and allow for on-line calculation of the control inputs. Its greatest advantage is its ability to consider constraints, on both inputs and states, directly and naturally. More recently, the improvements in processor speed have allowed its use in a wider range of problems, many involving faster dynamics. Nevertheless, implementation of MPC algorithms on embedded systems with resources, size, power consumption and cost constraints remains a challenge. In this thesis, High-Level Synthesis (HLS) is used to implement implicit MPC algo- rithms for linear (LMPC) and nonlinear (NMPC) plant models, considering constraints on both control inputs and states of the system. The algorithms are implemented in the Zynq@ -7000 All Programmable System-on-a-Chip (AP SoC) ZC706 Evaluation Kit, targeting Xilinx’s Zynq@-7000 AP SoC which contains a general purpose Field Programmable Gate Array (FPGA). In order to solve the optimization problem at each sampling instant, an Interior-Point Method (IPM) is used. The main computation cost of this method is the solution of a system of linear equations. A minimum residual (MINRES) algorithm is used for the solution of this system of equations taking into consideration its special structure in order to make it computationally efficient. A library was created for the linear algebra operations required for the IPM and MINRES algorithms. The implementation is tested on trajectory tracking case studies. Results for the linear case show good performance and implementation metrics, as well as computation times within the considered sampling periods. For the nonlinear case, although a high computation time was needed, the algorithm performed well on the case study presented. Because of resources constraints, implementation of the nonlinear algorithm on higher order systems was precluded.Modellprädiktive Regelung (engl: Model Predictive Control (MPC) ist, seit der Einfüh- rung in den späten 70er Jahren, eine gut angenommene Regelungstechnik, insbesondere für industrielle Prozesse, die typischerweise langsam sind und die online Steuergröße Berechnung ermöglichen. Ihr größter Vorteil ist die Fähigkeit, Beschränkungen bezüg- lich der Steuergrößen und der Regelgrößen zu berücksichtigen. In letzter Zeit hat die Verbesserung der Geschwindigkeit der Prozessoren den Einsatz in einer breitere Pro- blemreichweite mit einer schnelleren Dynamik ermöglicht. Allerdings bleibt die MPC Algorithmus-Implementierung in eingebetteten Systeme mit beschränkte Ressourcen, Größe, Energieverbrauch und Kosten eine Herausforderung. In dieser Arbeit wird die High-Level Synthesis (HLS) benutzt, um implizit MPC Algorithmen für lineare (LMPC) und nichtlineare (NMPC) Regelstrecken zu implemen- tieren, wobei Steuergröße- und Regelgrößenbeschränkungen berücksichtigt werden. Die Algorithmen sind im Zynq@-7000 AP SoC ZC706 Auswertungskit implementiert, wobei auf der Xilinxs Zynq@-7000 AP SoC, der ein allgemeiner Zweck FPGA enthält, abgezielt wird. Ein innere-Punkte Verfahren (engl: Interior-Point Method (IPM)) wird für die Lösung des Optimierungsproblems in jedem Sampling benutzt. Die größte Berechnungs- komplexität bei dem IPM ist die Lösung eines linearen Gleichungssystems. Ein minimaler Residuum-Algorithmus (MINRES) wird für die Lösung dieses Gleichungssystem benutzt, wobei die spezielle Struktur berücksichtigt wird, um das Verfahren recheneffizient zu machen. Es wurde eine Bibliothek mit Funktionen für die benötigten linearen Algebra Operationen in den IPM und MINRES Verfahren entwickelt. Die Implementierung wird in Trajektorieverfolgung Fallstudien getestet. Die Ergeb- nisse für den linearen Fall zeigen gute Leistungen und Metriken, sowie Rechenzeiten innerhalb des berücksichtigten Taktzeiten. Für den nichtlinearen Fall wurde eine ho- he Rechenzeit benötigt. Trotzdem hat der Algorithmus für die vorgestellte Fallstudie gut funktioniert. Infolge der Ressourcenbeschränkungen war die Implementierung des nichtlinearen Algorithmus für Systeme höherer Ordnung verhindert.TesisengPontificia Universidad Católica del PerúPEinfo:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-nd/2.5/pe/Control predictivoProcesos de manufacturaSistemas embebidos (Computadoras)https://purl.org/pe-repo/ocde/ford#2.00.00Implementation of a high performance embedded MPC on FPGA using high-level synthesisinfo:eu-repo/semantics/masterThesisreponame:PUCP-Tesisinstname:Pontificia Universidad Católica del Perúinstacron:PUCPSUNEDUMaestro en Ingeniería MecatrónicaMaestríaPontificia Universidad Católica del Perú. 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La información contenida en este registro es de entera responsabilidad de la institución que gestiona el repositorio institucional donde esta contenido este documento o set de datos. El CONCYTEC no se hace responsable por los contenidos (publicaciones y/o datos) accesibles a través del Repositorio Nacional Digital de Ciencia, Tecnología e Innovación de Acceso Abierto (ALICIA).